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# Lofi-12 XT — Findings Library
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Living knowledge base for this device. Process/tips live in `RE-PROCESS.md`.
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Per-version firmware notes: `Lofi-12XT_v*/…/reversed.md`; version diff: `rev-diff.md`;
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mod feasibility: `tweakability-report.md`; tool docs: `tools/README.md`.
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Deep dives: `docs/hardware.md`, `docs/bootloader.md`, `docs/firmware-update.md`,
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`docs/firmware/v1.5.205.md`.
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## 1. Hardware
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- Device: Sonicware Lofi-12 XT (shares platform with SmplTrek/Cydrums).
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- Main SoC (core module): **TI TMS320C6748** — ARM9 + C674x DSP. Marking on unit:
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`TMS320 C6748EZW T / 13CP99W / GI 375 / 527 ZWT`.
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- DRAM (core module): **EtronTech EM68C16CWQG-25H** — 1 Gbit DDR2, base `0xC0000000`.
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- SPI flash (core module, 2×): **Macronix MX25L12833F** (`MXIC MX 25L12833F M2I-10G`),
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16 MByte each, SOIC-8, silkscreen `IC300` / `IC301`. Shipping units hide the
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marking under small stickers (`C047`/`C949`-style labels) — peel + photo to confirm.
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- USB/aux MCU (main board): **ARTERY AT32F421K8T** (own firmware, out of scope).
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- Storage: full-size SD slot (firmware update + samples/projects).
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- PCBs seen: `405-VTOR-3852` (I/O), `405-VTOR-3849B` (main), `405-VTOR-3853` (jack),
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core module with `CN201A/CN200A/CN203A/CN203B` board-to-board connectors.
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- Silkscreen pin tables on main board expose `UART1_RX1/TX1`, `SPI1_SCK/MOSI`,
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`SD_*`, `USB_DP/DN`, key/LED matrix — worth mapping before any invasive work.
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## 2. Memory map (DDR2)
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| Region | Content |
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|---|---|
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| `0xC0000000…` | DDR2 base (128 MB) |
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| `0xC2xxxxxx` | SD `.bin` application image (DSP). v1.5 code `C2B80C00`, strings `C2D84DE0`, assets `C2DA7600` |
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| `0xC7074630–C70B0598` | SPI AIS bootloader image (DSP), entry `C70A28A0` |
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| `0xC706F280` | Runtime constant seen in updater (also == checksum seed, §5) |
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| `0xC27C6282` | Scratch DDR used by updater (§5; value doubles as checksum seed) |
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## 3. SPI flash layout (`ic300.bin` / `ic301.bin`, 16 MiB each)
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Dumps: `ic300.bin` (`c2b86808…`), `ic301.bin` (`81f7b1f5…`). Always keep these
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as recovery backups; re-verify with a second read (`sha256sum` + `cmp`).
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**IC300 (boot + app):** TI AIS image, magic `0x41504954` (`TIPA`) at file `0x0`.
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PLL/DDR config (`0x5853590D` ×2), then 10× Section Load (`0x58535901`):
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| File off | DDR | Size |
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|---|---|---|
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| `0x000050` | `C7074630` | `0x1D0` |
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| `0x00022C` | `C7074800` | `0x33B00` (main code) |
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| `0x033D38` | `C70A8300` | `0x28CC` (rodata) |
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| … | `C70AABD0`/`C70AABE0`/`C70AABF0` | `0xC`/`0xC`/`0xD44` |
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| … | `C70AF000`/`C70AF4E8`/`C70AF5EC`/`C70AF660` | `0x200`/`0x104`/`0x70`/`0xF38` |
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`JumpClose (0x58535906)` at file `0x38660` → entry `C70A28A0` (DSP reset prelude
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`ZERO b0; mvc b0,ier; mvc b0,csr`). After it: `FF` gap to `~0x100000`, data to
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`~0x1EFFFF`, `FF` gap `0x1F–0x4Fxxxx`, data `0x500000–0xFC7C17`. No AIS CRC opcodes.
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**IC301 (data):** `AILS` header + drum-pattern names (`KICK/HIHAT/BALLAD/BLUES/…`),
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24× `RIFF/WAVE` starting `0x8007E0`, nearly full to `0xFFFD7B`. Factory-sample flash.
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**Update path (from updater strings + code):** `SystemUpdater::{start,
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updateBootSection, updateMainSection, updatePresetSection, updateMCUSection,
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updateMCUBootSection}(CatMetaData::ROMSection)` + `SystemVerify::verifyPresetSection`.
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Public ZIPs ship only the SYSTEM section (the SD `.bin`); BOOT/PRESET/MCU use
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separate (unreleased) files. Updater lives in AIS flash, so a bad SYSTEM image
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cannot kill recovery — hold PAD while powering on → `SYSTEM UPDATE` still works.
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## 4. SD `.bin` container (`cmtd/mmtd/sect → EOF`)
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| Off | Field |
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|---|---|
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| `0x00` | `cmtd` magic |
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| `0x04` | u32 LE filesize (must match actual) |
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| `0x08` | u32 checksum — **solved, §5** |
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| `0x0C` | reserved 0 |
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| `0x10–0x2F` | `12, 1, 3, fw_maj, fw_min, fw_patch, 48, remaining` |
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| `0x30` | `mmtd` magic; `+0x04` remaining; `+0x08` flags (per-build, part of hash) |
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| `0x40` | fw triple; `0x4C` entry point; `0x50` sect count |
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| `0x54…` | `sect` ×N: `73 65 63 74` + u32 load_addr + u32 len + payload; must tile EOF |
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Known builds: v1.1.156 (1,595,605 B, entry `C26C4820`, 7 sects), v1.2.179
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(1,606,197 B, entry `C26CA4C0`, 6 sects), v1.5.205 (1,707,049 B, entry
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`C2CD1AA0`, 7 sects). Code is C674x LE, entropy ~6.89, unencrypted. Parser/packer:
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`tools/lofi_image.py` (`parse_image` asserts filesize + chain fit).
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## 5. Checksum (SOLVED)
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**Rule:** `cmtd+0x08` = CRC32-IEEE (init 0) over the entire file with bytes
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`[8:12]` replaced by `0xC27C6282`.
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- `tools/lofi_image.py`: `CKSEED = 0xC27C6282`, `compute_checksum()`; `build_image()`
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auto-computes by default (`--checksum keep` in `lofi_pack.py` preserves).
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- Proof: GF(2) linear solve per image for the 32 unknown bits at `[8:12]` gives
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`K = 0xC27C6282` on **all three** images independently (2⁻⁶⁴ fluke); forward
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recompute reproduces `F58AF539 / DFF0D8C2 / B17C0857`; `unpack→pack` rebuilds
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stock v1.5.205 byte-identical; a `Threshold→ThresholX` mod forges to a
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self-consistent `462F735B`.
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- Code anchors (bootloader DSP): CRC routine `C70A0A60`
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(`NOT A6→state`, poly `EDB88320` via `MVK/MVKH`, byte loop, final `NOT` in delay
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slot ≡ zlib chaining `F(buf,len,init)`); 4K-chunk caller `C708E4E4`
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(`MVK 0x1000`, `CMPGT`, `CALLP C70A0A60`); check fn `C709E7C0`
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(16-byte header CRC init 0 → chained 0x40000 chunks → `CMPEQ A13,A12` compare);
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orchestrator `C708678C CALLP C709E7C0`, reject path builds
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`ERROR : This file is invalid.` (`C70A8E82`).
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- Forging: build image normally, then set `[8:12] = compute_checksum(image)`.
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## 6. OLED / updater UI strings (orientation)
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`Checking... 0%`, `Check the firmware file.`, `ERROR : This file is invalid.`,
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`Erasing.../Writing.../Verifying... 0%`, `100%, done./OK./NG.`,
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`Update completed./Update failed.`, `Please restart.`, `Are you sure?`,
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`[CLR] : No / [OK] : Yes`, `>> BOOT/MCU/MCU Boot/PRESET/SYSTEM`,
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`BOOT:/MCU:/MCU Boot:/PRESET:/SYSTEM:`, `$ systemupdate`, `[Lofi-12 XT] ~`,
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`SYSTEM INFO/VERSION/BOOT/SYSTEM/MCU`, crash dumper (`Legacy NMI Exception`,
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`A0–A31/B0–B31`, `NTSR/ITSR/…`). v1.5-only markers: `AppAudioExport*`,
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`MIsolator/MRackComp/SlipRoll/HoldDelay`, `MIDINoteMap`, `REVERSE`,
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`removeResourceFork` (all present in IC300 → board runs v1.5).
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## 7. Open questions
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- `mmtd+0x08` flags semantics (timestamp? covered by checksum as-is, no need to crack).
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- Exact flash section table for BOOT/PRESET/MCU offsets (only SYSTEM reverse-engineered).
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- AT32F421 firmware extraction/update protocol.
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- UART/JTAG test-point mapping (silkscreen names exist, continuity not traced).
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